Areas of Research Interest
Energy-efficient logic and memory devices for future data-centric computing paradigm; Carbon-based and other emerging nano-materials including carbon nanotube, graphene, GNR, and TMDs; Experimental and computational nano-device research focusing on electronic (electron)/thermal (phonon)/magnetic (spin) transport; Beyond-CMOS nanoelectronics including spintronics (spin + electronics, magneto-electronics), steep sub-threshold swing (sub-60 mV/dec) transistors, and energy-harvesting and -conversion materials and devices technology
Areas of Teaching Interest
Introduction to Micro- and Nano-technology; Principles of Micro-fabrication; Fundamentals of Semiconductor Device Physics; Engineering Physics and Quantum Physics; Beyond-CMOS Electronics; Memory and Storage Devices Technology
Educational Background
Ph.D. in Electrical Engineering, Stanford University, 2015
Appointments
Sr. Pannel Process Engineer, Apple Inc., Cupertino, CA (2016)
Post-doctoral Researcher, Stanford University, Palo Alto, CA (2015-2016)
Summer Research Interns, IMEC (Belgium), SAIT (Korea), IBM T. J. Watson (Yorktown Heights, NY) (2011, 2012, 2013)
Research Scientist, KIST, Seoul, Korea (2007-2010)
Selected Publications
- H. Yan, H. R. Cherian, E. C. Ahn, X. Qian, and L. Duan, “iCELIA: A Full-Stack Framework for STT-MRAM-Based Deep Learning Acceleration”, IEEE Transactions on Parallel and Distributed Systems (IEEE-TPDS) 31, 408 (2020) – IF: 3.971
- Md. K. Anam, and E. C. Ahn, “Understanding the Effect of Dry Etching on Nanoscale Phase- Change Memory”, Nanotechnology 30, 495202 (2019) – IF: 3.399
- D. Fernandez, A. Sebastian, E. C. Ahn, M. R. Taha, S. Dessouky, and S. Ahmed, “Smart illuminative Charging (SiC) of Future Electric Vehicles Using Roadway Infrastructure”, MATEC Web of Conferences 271, 06006 (2019) – RG Journal Impact: 0.13
- A. H. Aboutalebi, E. C. Ahn, B. Mao, S. Wu, and L. Duan, “Mitigating and Tolerating Read Disturbance in STT-MRAM-Based Main Memory via Device and Architecture Innovations”, IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (IEEE-TCAD) 38, 2229 (2019) – IF: 1.203
- A. Asghari, N. A. Ulloa Castillo, E. Segura-Cardenas, A. O. Sustaita, W. Park, A. Yoon, and E. C. Ahn, “Enrichment of Solution-processable Single-walled Carbon Nanotubes for Flexible Nanoelectronics,” Materials Research Express 6, 0850b4 (2019) – IF: 1.151
- W. Park, J. Sohn, G. Romano, T. Kodama, A. Sood, J. S. Katz, B. S. Y. Kim, H. So, E. C. Ahn, M. Asheghi, A. M. Kolpak, and K. E. Goodson, “Impact of Thermally Dead Volume on Phonon Conduction along Silicon Nanoladders”, Nanoscale 10, 11117 (2018) – IF: 7.233
- E. C. Ahn, H.-S. P. Wong, and E. Pop, “Carbon Nanomaterials for Non-volatile Memories”, Nature Reviews Materials 3, 18009 (2018) – IF: 51.941
- W. Park, G. Romano, E. C. Ahn, T. Kodama, J. Park, M. Barako, J. Sohn, J. Cho, S. Kim, A. Marconnet, M. Asheghi, R. Sinclair, K. Goodson, “Phonon Conduction in Silicon Nanobeam Labyrinths”, Scientific Reports 7, 6233 (2017) – IF: 4.122
- E. C. Ahn, S. Fong, Y. Kim, S. Lee, A. Sood, C. Neumann, M. Asheghi, K. Goodson, E. Pop, and H.-S. P. Wong, “Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier”, Nano Letters 15, 6809 (2015) – IF: 12.080
- L. Li, X. Chen, C.-H. Wang, J. Cao, S. Lee, A. Tang, C. Ahn, S. Roy, M. Arnold, and H.-S. P. Wong, “Vertical and Lateral Cu Transport through Graphene Layers”, ACS Nano 9, 8361 (2015) – IF: 13.709
- E. C. Ahn, Z. Jiang, C.-S. Lee, H.-Y. Chen, J. Liang, L. Liyanage, and H.-S. P. Wong, “1D Selection Device using Carbon Nanotube FETs for High-density Cross-point Memory Arrays”, IEEE Trans. Electron Devices 62, 2197 (2015) – IF: 2.605
- K. Kim, H.-B.-R. Lee, R. Johnson, J. Tanskanen, N. Liu, M.-G. Kim, C. Pang, C. Ahn, S. Bent, and Z. Bao, “Selective Metal Deposition at Graphene Line Defects by Atomic Layer Deposition”, Nature Communications 5, 4781 (2014) – IF: 12.353
- T. Y. Lee, C. Ahn, B.-C. Min, J. M. Lee, K.-J. Lee, S. H. Lim, S.-Y. Park, Y. Jo, J. Langer, B. Ocker, W. Maass, and K.-H. Shin, “Critical switching current and thermal stability of magnetic tunnel junctions with uncompensated CoFeB/Ru/CoFeB synthetic free layers”, Journal of Applied Physics 113, 093906 (2013) – IF: 2.176
- K. Y. Jung, B.-C. Min, C. Ahn, G.-M. Choi, I.-J. Shin, S.-Y. Park, K. Rhie, and K.-H. Shin, “Fabrication of nano-sized magnetic tunnel junctions using lift-off process assisted by atomic force probe tip”, Journal of Nanoscience and Nanotechnology 13, 6467 (2013) – IF: 1.354
- E. C. Ahn, B. Lee, R. Jeyasingh, M. Asheghi, G.A.M. Hurkx, K. Goodson, and H.-S. P. Wong, “Effect of Resistance Drift on the Activation Energy for Crystallization in Phase Change Memory”, Japanese Journal of Applied Physics 51, 02BD06 (2012) – IF: 1.452
- E. C. Ahn, B. Lee, R. Jeyasingh, M. Asheghi, G.A.M. Hurkx, K. Goodson, and H.-S. P. Wong, “Crystallization Properties and Their Drift Dependence in Phase-Change Memory Studied with a Micro-Thermal Stage”, Journal of Applied Physics 110, 114520 (2011) – IF: 2.176
- E. C. Ahn, K.-H. Shin, J. Bass, R. Loloee, and W. Pratt, Jr., “Current-Perpendicular-to-Plane Spin Transport Properties of CoFe Alloys: Spin Diffusion Length and Scattering Asymmetry”, Journal of Applied Physics 108, 023908 (2010) – IF: 2.176
- E. C. Ahn, K.-H. Shin, and W. Pratt, Jr., “Magnetotransport properties of CoFeB and Co/Ru interfaces in the current-perpendicular-to-plane geometry”, Applied Physics Letters 92, 102509 (2008) – IF: 3.495
- M. Shin, J. Lee, and C. Ahn, “Simulation Study of the Scaling Behavior of Top-Gated Carbon Nanotube Field Effect Transistors”, Journal of Nanoscience and Nanotechnology 8, 5389 (2008) – IF: 1.354
- E. C. Ahn and M. Shin, “Quantum Simulation of Coaxially Gated CNTFETs by Using an Effective Mass Approach”, Journal of the Korean Physical Society 50, 1887 (2007) – IF: 0.418
See Dr. Ahn’s full list of publications at Google Scholar.